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The 8051
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The Special Function Registers (SFRs) |
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The SFRs are in locations 80H to FFH of the on-chip RAM.
In the 8051 not all locations are used. These extra locations are used by
other family members (8052, etc.) for the extra features these microcontrollers
possess. |
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| 7F |
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General Purpose RAM
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| 30 |
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| 2F |
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| 2E |
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| 2D |
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| 2C |
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| 2B |
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| 2A |
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| 28 |
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| 28 |
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| 27 |
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| 26 |
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| 25 |
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| 24 |
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| 23 |
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| 22 |
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| 21 |
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| 20 |
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| 07 |
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Default Register Bank (Bank 0)
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| 00 |
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| F0 |
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B |
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| E0 |
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ACC |
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| D0 |
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PSW |
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| B8 |
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IP |
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| B0 |
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P3 |
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| A8 |
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IE |
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| A0 |
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P2 |
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| 99 |
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SBUF |
| 98 |
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SCON |
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| 90 |
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P1 |
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| 8D |
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TH1 |
| 8C |
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TH0 |
| 8B |
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TL1 |
| 8A |
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TL0 |
| 89 |
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TMOD |
| 88 |
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TCON |
| 87 |
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PCON |
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| 83 |
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DPH |
| 82 |
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DPL |
| 81 |
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SP |
| 80 |
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P0 |
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RAM
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SPECIAL FUNCTION REGISTERS
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As you can see, some of the SFRs are bit addressable, including
the four ports P0, P1, P2 and P3. |
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Program Status Word (PSW) |
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The PSW is at location D0H and is bit addressable. The table
below describes the function of each bit. |
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| Bit |
Symbol |
Address |
Description |
| PSW.7 |
CY |
D7H |
Carry flag |
| PSW.6 |
AC |
D6H |
Auxiliary carry flag |
| PSW.5 |
F0 |
D5H |
Flag 0 |
| PSW.4 |
RS1 |
D4H |
Register bank select 1 |
| PSW.3 |
RS0 |
D3H |
Register bank select 0 |
| PSW.2 |
OV |
D2H |
Overflow flag |
| PSW.1 |
-- |
D1H |
Reserved |
| PSW.0 |
P |
D0H |
Even parity flag |
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Carry Flag |
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The carry flag has two functions. |
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- Firstly, it is used as the carry-out in 8-bit addition/subtraction.
For example, if the accumulator contains FDH and we add 3 to the contents
of the accumulator (ADD A, #3), the accumulator will then contain zero
and the carry flag will be set. It is also set if a subtraction causes
a borrow into bit 7. In other words, if a number is subtracted from
another number smaller than it, the carry flag will be set. For example,
if A contains 3DH and R3 contains 4BH, the instruction SUBB A, R3 will
result in the carry bit being set (4BH is greater than 3DH).
- The carry flag is also used during Boolean operations. For example,
we could AND the contents of bit 3DH with the carry flag, the result
being placed in the carry flag - ANL C, 3DH
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Register Bank Select Bits |
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Bits 3 and 4 of the PSW are used for selecting the register
bank. Since there are four register banks, two bits are required for selecting
a bank, as detailed below. |
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| PSW.4 |
PSW.3 |
Register Bank |
Address of Register Bank |
| 0 |
0 |
0 |
00H to 07H |
| 0 |
1 |
1 |
08H to 0FH |
| 1 |
0 |
2 |
10H to 17H |
| 1 |
1 |
3 |
18H to 1FH |
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For example, if we wished to activate register
bank 3 we would use the following instructions - |
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SETB RS1
SETB RS0
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If we then moved the contents of R4 to the accumulator
(MOV A, R4) we would be moving the data from location 1CH to A. |
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Flag 0 |
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Flag 0 is a general-purpose flag available to
the programmer. |
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Parity Bit |
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The parity bit is automatically set or cleared
every machine cycle to ensure even parity with the accumulator. The number
of 1-bits in the accumulator plus the parity bit is always even. In other
words, if the number of 1s in the accumulator is odd then the parity bit
is set to make the overall number of bits even. If the number of 1s in the
accumulator is even then the parity bit is cleared to make the overall number
of bits even. |
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For example, if the accumulator holds the number
05H, this is 0000 0101 in binary => the accumulator has an even number
of 1s, therefore the parity bit is cleared. If the accumulator holds the
number F2H, this is 1111 0010 => the accumulator has an odd number of
1s, therefore the parity bit is set to make the overall number of 1s even. |
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As we shall see later in the course, the parity
bit is most often used for detecting errors in transmitted data. |
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B Register |
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The B register is used together with the accumulator
for multiply and divide operations. |
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- The MUL AB instruction multiplies the values in A and B and stores
the low-byte of the result in A and the high-byte in B.
- For example, if the accumulator contains F5H and the B register
contains 02H, the result of MUL AB will be A = EAH and B = 01H.
- The DIV AB instruction divides A by B leaving the integer result in
A and the remainder by B.
- For example, if the accumulator contains 07H and the B register
contains 02H, the result of DIV AB will be A = 03H and B = 01H.
The B register is also bit-addressable. |
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Stack Pointer |
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The stack pointer (SP) is an 8-bit register at
location 81H. A stack is used for temporarily storing data. It operates
on the basis of last in first out (LIFO). Putting data onto the stack is
called "pushing onto the stack" while taking data off the stack
is called "popping the stack." |
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The stack pointer contains the address of the
item currently on top of the stack. On power-up or reset the SP is set to
07H. When pushing data onto the stack, the SP is first increased by one
and the data is then placed in the location pointed to by the SP. When popping
the stack, the data is taken off the stack and the SP is then decreased
by one. |
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Since reset initialises the SP to 07H, the first
item pushed onto the stack is stored at 08H (remember, the SP is incremented
first, then the item is placed on the stack). However, if the programmer
wishes to use the register banks 1 to 3, which start at address 08H, he/she
must move the stack to another part of memory. The general purpose RAM starting
at address 30H is a good spot to place the stack. To do so we need to change
the contents of the SP. |
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Now, the first item to be pushed onto the stack
will be stored at 30H. |
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Copyright
(c) 2005-2006 NyCelt LLC
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