The 8051

 
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  The Central Processing Unit
   
 
   
  The above block diagram can be broken down further, as shown below.
   
 
   
  Two of the special function registers are shown at the top. These are the instruction register and the program counter and are used together with the instruction decoder in the execution cycle.
   
 
  • As was said earlier, the system program is stored in ROM. The program counter is used for storing the position of the next instruction.
  • The instruction register is used for storing the current instruction.
  • The instruction decoder decodes the instruction (ie; it determines, from the instruction, what operation to perform).
   
  The Execution Cycle
 

What is meant by execution? It is the CPU's performance of an operation, as dictated by the current instruction. When an embedded system is powered up (eg; you switch on your mobile phone) the CPU fetches the first instruction from ROM. It then figures out what operation it must perform, as dictated by the instruction. It performs the operation and then gets the next instruction from ROM, performs the appropriate operation as governed by this instruction, then gets the next instruction, and so on.
   
  More specifically, on power up, the location of the first instruction in ROM is loaded into the program counter (PC). The CPU then fetches the instruction from the location pointed to by the PC and stores this instruction in the instruction register (IR). The instruction decoder and control unit decode the instruction and initiate and control the operation (the actual operation is carried out by the ALU). Then the program counter is increased, so that it points to the next instruction in ROM and the process is repeated.
   
  To get a better understanding of the execution cycle, try out EdSim51's Execution Cycle Simulation.
   
  Two-byte Instructions
  After accessing the demonstration above you will, hopefully, have a clearer picture of the execution cycle. However, the demonstration deals with one-byte instructions only. One-byte instructions (8-bits) take only one memory location and therefore, once executed, the program counter is increased by one to point to the location of the next instruction.
  Part of the instruction decoder's job is to find out how big the instruction is. If it's only one byte in length, then the instruction is executed and the program counter is increased by one. However, if the instruction is two bytes in length, it takes up two memory locations and only the first half has been fetched from memory. Therefore, the control unit initiates a second fetch by increasing the PC by one to point at the second half of the instruction and read it from memory. Then the instruction is executed.
  Once the two-byte instruction has been executed the program counter is increased again by one (resulting in an overall increase of two) to point to the next instruction.
   
  Three-byte instructions
  Similar to the two-byte instruction, if the instruction decoder sees a three byte instruction, the following two-thirds of the instruction are fetched from ROM and the instruction is executed. Overall, the program counter is increased by three to point to the next instruction.
   
  Therefore, it is important to note that the program counter is not always increased by one during an instruction execution. We will later see how the instruction decoder knows the size of an instruction from the first byte retrieved from memory. We will also see that some instructions cause the program counter to change to a value that has nothing to do with the size of the instruction.
   
  Execution Cycle
  The steps involved in the execution cycle are:
 
  • Contents of the PC (program counter) are placed on the address bus.
  • Read cycle is executed, placing the opcode into the IR (instruction register).
  • Opcode is decoded.
  • If instruction is a two-byte instruction:
    • PC is incremented and a read is executed to get the operand.
  • If instruction is a three-byte instruction:
    • PC is incremented and a read is executed to get the first half of the operand.
    • PC is incremented and a read is executed to get the second half of the operand.
  • Operation is carried out and PC is incremented to point at the next instruction.
   
   
 
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